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Ordering number : EN5548A
Wideband Output Module (Video Pack)
VPS13
CRT Display Video Output Amplifier, High-Voltage/Wideband Amplifier
Features
* High output voltage and wide bandwidth; optimal for use in fH (horizontal deflection frequency) = 100 kHz class monitors. (f = 130 MHz -3 dB at VOUT = 40 Vp-p) * SIP molded 15-pin package houses three amplifier channels.
Package Dimensions
unit: mm 2127A
[VPS13]
Specifications
Absolute Maximum Ratings at Ta = 25C
Parameter Maximum supply voltage Allowable power dissipation Maximum junction temperature Maximum case temperature Storage temperature Symbol VCC max VBB max Pd max Tj max Tc max Tstg With an ideal heat sink at Tc = 25C Conditions Ratings 90 15 30 150 100 -20 to +110 Unit V V W C C C
Operating Conditions at Ta = 25C
Parameter Recommended supply voltage Symbol VCC VBB Conditions Ratings 80 10 Unit V V
Electrical Characteristics at Ta = 25C (for a single channel)
Parameter Symbol Conditions VCC = 80 V, VBB = 10 V, CL = 10 pF VIN (DC) = 3.2 V, VOUT (p-p) = 40 V VCC = 80 V, VBB = 10 V, CL = 10 pF VIN (DC) = 3.2 V, VOUT (p-p) = 40 V 13 VCC = 80 V, VBB = 10 V, VIN (DC) = 2.9 V, f = 10 MHz clock, CL = 10 pF, VOUT (p-p) = 40 V VCC = 80 V, VBB = 10 V, VIN (DC) = 2.9 V, f = 130 MHz clock, CL = 10 pF, VOUT (p-p) = 40 V Ratings min typ 130 3.5 2.9 15 47 85 17 max Unit
Frequency band (-3 dB)
fc tr tf VG (DC) ICC(1)
MHz ns ns double mA mA
Impulse response Voltage gain
Current drain ICC(2)
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83097HA (OT)/03096HA (OT) No. 5548-1/4
VPS13 Internal Equivalent Circuit
Test Circuit (for a single channel)
No. 5548-2/4
VPS13
Thermal Design Since the VPS13 includes three channels as shown in the circuit diagram on page 2, we first consider a single channel. The chip temperature of each transistor under actual operating conditions is determined using the following formula. Tj = (Tri) = j-c (Tri) x Pc (Tri) + Tc + Ta (C) .......................(1) j-c (Tri) : Thermal resistance of an individual transistor Pc(Tri) : Collector loss for an individual transistor Tc : Case temperature rise Ta : Ambient temperature The j-c (Tri) for each chip is: j-c (Tr1) = 35C/W
j-c (Tr2) to (Tr4) = 30C/W.......................................................(2)
Although the loss for each transistor in a video pack varies with frequency and is not uniform, if we assume the maximum operating frequency, f = 130 MHz (clock), then the chip with the largest loss will be transistor 3 (Tr3) of the emitter-follower stage. From the Pd-f (clock) figure we see that loss will be 22% of the total loss for a single channel: Pc (emitter-follower stage)(f = 130 MHz) = Pd (1ch) (f = 130 MHz) x 0.22 [W] (3)
Here, we must select a heat sink with a capacity h such that the Tj of these transistors does not exceed 150C. Equation (4) below gives the relationship between h and Tc. Tc = Pd (Total) x h ..................................................................(4) The required h is calculated using this equation and equation (1).
No. 5548-3/4
VPS13 VPS13 Thermal Design Example Conditions: Using an fH = 100 kHz class monitor, fV = 130 MHz (clock) VCC = 80 V, VBB = 10 V, VOUT = 40 Vp-p (CL = 10 pF) Here we consider the case where this class of monitor is operated up to Ta = 60C at a maximum clock frequency of f = 130 MHz. As mentioned previously, the chip with the largest loss is transistor 3 (Tr3) of the emitter-follower stage. Determining that value gives: Pc (emitter-follower stage) = 6.8 x 0.22 1.5 [W] .....................(5) Now, determine Tj by substituting the value for j-c in equation (5). Tj = 1.5 x 30 = 45 [C] Here, Tj < 50C, and we need only consider cases where Tc < 100 C. Therefore, we must design a h for the heat sink such that the Tc < 100C condition holds when three channels are operating at maximum levels, i.e., Pd(TOTAL) = Pd(one channel) x 3. Tc will be 100 - 60 = 40 C, and therefore: h = Tc / Pd (TOTAL) = 40 / (6.8 x 3) = 2.0, i.e. h = 2.0 C/W In actual practice, the ambient temperature and operating conditions will allow a heat sink smaller than that indicated by this calculation to be used. Therefore, design optimization taking the actual conditions and the above data into account is also required.
VCC (V) 80
VBB (V) 10
VOUT (V) 40
VO (center) 45
s No products described or contained herein are intended for use in surgical implants, life-support systems, aerospace equipment, nuclear power control systems, vehicles, disaster/crime-prevention equipment and the like, the failure of which may directly or indirectly cause injury, death or property loss. s Anyone purchasing any products described or contained herein for an above-mentioned use shall: Accept full responsibility and indemnify and defend SANYO ELECTRIC CO., LTD., its affiliates, subsidiaries and distributors and all their officers and employees, jointly and severally, against any and all claims and litigation and all damages, cost and expenses associated with such use: Not impose any responsibility for any fault or negligence which may be cited in any such claim or litigation on SANYO ELECTRIC CO., LTD., its affiliates, subsidiaries and distributors or any of their officers and employees jointly or severally. s Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume production. SANYO believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual property rights or other rights of third parties. This catalog provides information as of August, 1997. Specifications and information herein are subject to change without notice. No. 5548-4/4

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